Klappentext

This textbook provides a starter s guide to Verilog, to be used in conjunction with a one-semester course in Digital Systems Design, or on its own for readers who only need an introduction to the language. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the presentation with learning goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to dö after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome.

Written the way the material is taught, enabling a bottom-up approach to learning which culminates with a high-level of learning, with a solid foundation;

Emphasizes examples from which students can learn: contains a solved example for nearly every section in the book;

Includes more than 200 exercise problems, as well as concept check questions for each section, tied directly to specific learning outcomes.